Wei-Hsin Wade Chang is a Senior Engineer at Citadel Securities with experience in low latency technology, FPGA, Verilog, SystemVerilog, and Python. Prior to this, Chang worked as a Senior Staff Engineer at Qualcomm Corp R&D where Wei-Hsin Wade was involved in HW architecture of LTE UE Rx modem for 4G/5G wireless systems. Wei-Hsin Wade also has experience as a Co-op at Texas Instruments and as an Interim Engineer at Qualcomm and Sunplus. Chang holds a Ph. D in Electrical and Computer Engineering from UC San Diego, a Master's in Electronic Engineering from National Chiao Tung University, and a BS in Electrical Engineering from National Tsing Hua University.
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