Ashik P.

Ashik P. has six years of professional experience in the technology industry. In 2020, Ashik began working as an FPGA and ASIC Engineer at cPacket Networks and a Verification Engineer - FPGA at SiFive. From 2017 to 2020, Ashik was a System Engineer AI at Pathtronic. From 2017 to 2016, Ashik was a Research Assistant at New York University, where they developed a state-of-the-art hardware-accelerated anti-virus engine with a throughput of 40 Gbps on the FPGA, and delivered tutorials regarding the implementation of RC5 hardware and Single Cycle MIPS for graduate and undergraduate students. Additionally, Ashik contributed to research regarding FPGA speed zone and FPGA fingerprint. From 2012 to 2016, Ashik was a System Engineer at Tata Consultancy Services, where they developed projects involving coding languages such as Perl, SQL, bash and COBOL, and took on roles such as Developer, Unit tester, Releasing code to QA environment and Solving Action items.

Ashik P. earned a Bachelor's degree in Electrical, Electronics and Communications Engineering from Manipal Institute of Technology between 2008 and 2012. Afterward, they obtained a Master's degree in Computer Engineering from New York University between 2015 and 2017.