Jay Sung

Sr FPGA Design Engineer at Creative Digital Systems Integration

Jay Sung has over 30 years of experience in the field of engineering, with expertise in FPGA and ASIC design. Jay currently works at Creative Digital Systems Integration as a Senior FPGA Design Engineer since June 2021. Prior to this, Jay held a position at Spin Memory from October 2018 to May 2021 as a Senior Digital Design Engineer, where they focused on improving endurance and characteristics of MRAM memories. Before Spin Memory, they served as a Senior FPGA Engineer at Netlist from December 2015 to August 2018, and as a Senior FPGA Engineer at KingTiger Technology from March 2002 to December 2015. Early in their career, Jay worked as a Senior ASIC Engineer at ATMOS from November 2000 to October 2001, and at Samsung Electronics from January 1990 to November 2000.

Jay Sung received a Bachelor of Science in Electrical Engineering (EE) from Korea University.

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