Marc Gantenbein

FPGA And Hardware Engineer at Daedalean

Marc Gantenbein is an experienced FPGA and Hardware Engineer at Daedalean AI, focusing on the design and verification of computer vision pipelines and neural network accelerators in safety-critical environments since August 2022. Prior to this role, Gantenbein was a trainee in low-level embedded software at Sonova Group, where development of a protocol sniffer for hearing devices was undertaken. Educational background includes a Master of Science in Electrical Engineering and Information Technology from ETH Zürich, complemented by an Erasmus semester at École Polytechnique. Additional experience includes a teaching assistant position at ETH Zürich, civil service at Fachhochschule Nordwestschweiz FHNW, and an internship at Meteomatics, covering a range of topics from digital circuit design to software development for meteorological applications.

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Zürich, Switzerland

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Daedalean

Daedalean is building autonomous piloting software systems for civil aircraft of today and advanced aerial mobility of tomorrow.