David Garau

David Garau has worked in the technology industry for over 20 years. In 1999, they began as a System Design and Validation Engineer at PMC-Sierra. In 2005, they moved to Teradici Corporation as an Engineering Manager - Silicon Validation. During their time at Teradici, they were responsible for FPGA prototyping, bring up, and validation of Teradici’s PCoIP SOC ASIC devices. David also assisted with customer issue resolution and helped to build up both the validation and applications engineering teams. In 2015, they joined Dali Wireless as a Senior FPGA Developer and introduced an FPGA design flow which included a revision control system, scripted automated build system, and AXI-LITE IP infrastructure for the modular definition of system control planes (configuration and status registers). David also implemented a standards compliant CPRI PHY layer block using the Xilinx GTX transceivers. David continued in this role until 2016.

David Garau attended the University of Victoria from 1997 to 1999, where they obtained a B.Eng. in Electrical Engineering. Prior to that, they attended the British Columbia Institute of Technology from 1992 to 1993, where they obtained a Diploma in Robotics and Automation Technology.