Li-Hsu Yang

Li-Hsu Yang worked as an Electrical Engineer at Eta Compute starting in January 2016. In this role, they were responsible for designing analog circuits and sub-threshold cells for electrical circuits such as PLLs, buck converters, POR, and custom logic blocks. They also characterized the custom 55nm I/O custom library using the Liberate tool from Cadence. Prior to this, Li-Hsu worked as a Graduate Student Researcher at UCLA from June 2015 to January 2016.

Li-Hsu Yang earned a Bachelor's Degree in Optoelectronics from National Central University from 2010 to 2014. Later, from 2014 to 2016, Li-Hsu Yang pursued a Master of Science (M.S.) in Electrical Engineering from UCLA. Additionally, Li-Hsu Yang obtained various certifications, including a Deep Learning Specialization from Coursera in May 2020, an edX Honor Code Certificate for Introduction to Statistics: Inference, Probability and Descriptive Statistics in August 2013, an edX Honor Code Certificate for Introduction to Solid State Chemistry in January 2013, and an edX Honor Code Certificate for Circuits and Electronics in December 2012.