Syed M. Alam

Syed M. Alam has a long history of work experience beginning in 1998 with a summer internship at Softex Inc. Syed M. then went on to a summer internship at Intel in 2001. In 2003, they interned at IBM T. J. Watson Research Center where they designed and taped out a test chip in 3D SOI technology. In 2004, they joined Freescale Semiconductor as a Senior Staff Design Engineer. There they were responsible for physical design and integration, SI noise analysis and timing impact in three microprocessor tape-outs, as well as research and development for RTL design of an MRAM BIST engine and for exploration of 3D Integration technology. In 2008, Syed M. Alam spun off to Everspin Technologies as the Sr Director of Design Engineering. Syed M. then became the Director of Design Engineering, leading the design functional areas for embedded and standalone STT-MRAM products. Syed M. also served as the Architecture and Strategy Lead, Distinguished Member of Technical Staff and the Chip Design Lead, Senior Member of Technical Staff. In these roles, they were responsible for defining architecture of standalone and embedded STT-MRAM memory, evaluating architecture trade-offs in die size, design complexity, power, and performance, and chip design for 64Mb and 256Mb DDR3 STT-MRAM.

Syed M. Alam completed their educational journey with a certificate from edX in December 2019. Syed M. obtained a Ph.D. in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology in 2004, an S.M. from the same institution in 2001, and a B.S. in Electrical Engineering from the University of Texas at Austin in 1999.