Taher Anaya

VLSI Design Verification Engineer. at EXALT Technologies Ltd.

Taher Anaya is a Hardware Design Verification Engineer at Cisco since August 2022 and has been working as a VLSI Design Verification Engineer at EXALT Technologies Ltd. since September 2021, where previous roles included VLSI Design Verification Engineer and VLSI Design Verification Intern. Taher completed a Bachelor of Engineering in Computer Engineering from An Najah National University, where studies were undertaken from September 2018 to August 2022.

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