Ujjwal Sharma

Ujjwal Sharma is a Hardware Engineer at F5 since July 2024, specializing in the design and validation of advanced hardware subsystems for 400G networking and modular architectures, with a focus on power and signal integrity. Prior experience includes roles as a Hardware Design Engineer at cPacket, where responsibilities encompassed full lifecycle hardware development for high-speed networking systems, and as a Hardware Development Engineer at Abbott, where Ujjwal designed power circuits and automated high-voltage testing. Ujjwal also worked as an Electrical Engineer at Maquet Getinge Group, managing defect analysis and ensuring EMC compliance, and interned at Medtronic in product development and validation. Ujjwal holds a Master’s Degree in Electrical and Computer Engineering from the University of New Haven and a Bachelor’s Degree in Electrical and Electronics Engineering from Manipal Institute of Technology.