Rohan Raghunath is an experienced RFIC Design Engineer at GN Group since April 2023, specializing in layout design and verification of RX frontend per specifications. Previously, Rohan held roles at Ericsson, where responsibilities included characterizing and validating RF-ASICs as an RFIC Validation Engineer and serving as a Scrum Master. Rohan's experience also includes consulting on RF ASICs, designing Analog IC solutions, and a Master Thesis in low-power receiver front-ends at Arm. Educational qualifications include a Master of Science in Embedded Electronics from Lund University and a Bachelor's in Electronics and Telecommunications from the University of Mumbai.
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