Parthit Sardhara is an experienced engineer with a diverse background in electronic design and development. Parthit began as a Trainee at Physical Research Laboratory in early 2018 and progressed through various roles at Softnautics LLP as an Associate Engineer and at Cadence Design Systems, where Parthit served as both Design Engineer II and Lead Design Engineer. Following a brief tenure at Provino Technologies as a Staff Engineer, Parthit joined Qualcomm as a Senior Lead Engineer. Currently, Parthit is working as an RTL Design Engineer at Google, starting in August 2024. Parthit has a Master's degree in Microelectronics from Birla Institute of Technology and Science, Pilani, and a Bachelor’s degree in Electrical, Electronics and Communications Engineering from Dharmsinh Desai University, graduating with First Class with Distinction.
This person is not in the org chart
This person is not in any teams
This person is not in any offices