Tyrone Hill

Tyrone Hill, PhD, currently serves as an ASIC Architect for Tensor System on Chip at Google since August 2019. Prior to this role, Tyrone Hill worked at Intel from September 2008 to August 2019 as a Hardware Engineer, focusing on the development of power and thermal management algorithms for mobile and desktop CPUs, performance modeling, customer enabling, documentation, and hardware prototyping of new technologies. Earlier experience includes an internship as a Rotation Engineer at Sandia National Laboratories in 2004, where research in microfluidics involved developing metal deposition processes on plastic substrates, e-beam lithography on glass substrates, and designing a simple electrokinetic trapping device. Tyrone Hill holds a PhD in Electrical Engineering from the Massachusetts Institute of Technology and a BS in Electrical Engineering from the University of Illinois Urbana-Champaign.