Abdelaali Khardazi

Abdelaali Khardazi is a Design Verification Engineer currently at indie Semiconductor since July 2022. Prior experience includes a similar role at MU-Electronics from March 2021 to July 2022, where Abdelaali specialized in SystemVerilog (SV), SystemVerilog Assertions (SVA), Universal Verification Methodology (UVM), and VHDL, notably building Universal Verification Components (UVCs) from scratch. Previous roles encompass an end-of-studies internship focused on digital verification with UVCs and random UVM tests, and a project at Ecole Nationale des Sciences Appliquées on modeling and numerically solving water hammer effects using C and MatLab. Abdelaali completed a Diplôme d'ingénieur in aeronautics and embedded systems from Ecole Nationale des Sciences Appliquées de Berrechid in 2021, and holds a Licence in Physics from Faculté des Sciences Semlalia Marrakech, earned in 2018.