Stefano Zanatta

Stefano Zanatta has extensive work experience in digital physical design and DFT engineering. Stefano started their career as a Product/Test Engineer at STMicroelectronics, Srl in 2001. Stefano then joined STMicroelectronics, Inc in 2005, where they worked as a DFT Engineer and later became a Senior DFT Engineer and section manager. At STMicroelectronics, Inc, they were responsible for SOC DFT implementation and led the test strategy definition and implementation for multiple devices. Stefano also implemented and verified JTAG 1149.1, scan insertion and verification techniques.

In 2011, Stefano joined LSI Corporation as a DFT Engineer, where they worked until 2014. Stefano then moved to Marvell Semiconductor in 2015, where they worked as a Senior DFT Engineer until 2016. Stefano then joined Intel Corporation as a Senior DFT Engineer and worked there until 2018.

Currently, Stefano is working at indie Semiconductor as the Director of Digital Physical Design & DFT, and they have also held the role of Digital Physical Design & DFT Manager. Stefano'swork experience demonstrates their expertise in the field of digital physical design and DFT engineering.

Stefano Zanatta pursued their education at the University of Padova from 1993 to 2000. During this time, they completed a Master's degree in Electrical Engineering with a specialization in Telecommunication Systems. Prior to that, from 1988 to 1993, they attended Liceo Scientifico, though no specific degree or field of study information is available for this period.