Roy Reyes

Backed Clock Design Lead

Roy Reyes is a senior engineer specializing in clock design and integrated circuits with extensive experience at Intel Corporation and INFINISIM, INC. Currently serving as the backed clock design lead at Intel since July 2022, Roy oversees clock architecture for chiplet designs, SOCs, and CPUs while managing simulations related to aging and power variations. Previously, at INFINISIM, Roy excelled as an applications engineer for clocking, simulating extensive clock domains and authoring technical papers on challenges faced in sub-10nm processes. Earlier roles at Universal Creative involved leading a team in the design and installation of large mechanical rides, while previous tenures at Intel included engineering management and clock design analysis, contributing significantly to static timing and new product introduction. Roy holds a Master of Science in Electrical Engineering from the University of Miami and has roots in the Department of the Navy, where contributions were made to next-generation computer standards.

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