Pauline Desnos

Pauline DESNOS is a seasoned hardware engineer with extensive experience in network technologies, currently employed at IRT b-com since 2013, focusing on multi-Radio Access Technology platforms and IoT applications utilizing FPGA. Previously, Pauline worked in the Network Architecture lab on a Unified Gateway project employing OpenVSwitch and OpenDayLight. Earlier professional endeavors included a development internship at CAPS entreprise, where Pauline engineered code optimization tools for hybrid architecture using LUA and Fortran, and a project with BlueKanGo that involved enhancing a web application by integrating multilingual capabilities. Pauline also gained foundational experience through a short initiation project at Oceon on systems for oil extraction. Educational qualifications include studies at the Rochester Institute of Technology and a degree from INSA de Rennes, complemented by a scientific baccalaureate from Lycée Français Louis Pasteur.