Rubén Pérez De Aranda

Mr. Pérez de Aranda has served as a profile manager on R&D projects in digital communication systems, including channel coding and modulation schemes design, synchronization and timing recovery, channel and noise estimation algorithms, optimal equalization algorithms and Multiple-Input Multiple-Output (MIMO) systems, and developing technology patents. He previously worked as the head of the Project R&D department of SIDSA Systems-on-Chip, leading important projects related to DSL technology and 4GBB (4th Generation Broadband), the more promising successor of the hybrid fiber/copper VDSL2 access technology.

Mr. Pérez de Aranda also has collaborated in DS2 as a software R&D engineer in the firmware department designing and implementing real-time software for PLC modems as well as VoIP over PLC. Mr. Pérez de Aranda holds a degree in industrial engineering from the Polytechnic University of Madrid (Spain), specializing in automatic control and electronics.