Yu-Ping Wang is a seasoned engineer with extensive experience in ASIC and digital design, currently serving as a Senior ASIC Engineer at Lemurian Labs since April 2022. Previous roles include Senior Application Engineer at Agnisys Inc, focusing on customer support and technical presentations, and Staff Engineer at SK Hynix Memory Solutions, where design verification for solid-state drive controllers was performed. Prior experience includes contract validation engineering at Intel Corporation, and senior IC design roles at UPEK and STMicroelectronics, where fingerprint sensor technology was developed. Additional experience encompasses design roles at National Semiconductor and Cirrus Logic, involving PC chipset development. Yu-Ping Wang holds a Master's degree in Electrical Engineering from Santa Clara University and a Bachelor's degree in Electrical Engineering and Computer Sciences from the University of California, Berkeley.
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