Haris H.

Haris H. is a Digital Electronics Engineer at LUNA Innovations since September 2023, with prior experience as an FPGA Engineer at European XFEL, focusing on R&D for machine learning projects on FPGA platforms. At VEC Imaging GmbH & Co. KG, Haris specialized in VHDL RTL design and testbench simulation for X-ray tube power supply units. An Embedded C Developer at the University of Erlangen-Nuremberg, contributions included developing voltage-test modules for the foxBMS battery management system. Earlier roles involved designing interfaces and system GUIs for battery management systems at Fraunhofer IISB and assisting in database development for IoT applications at Fraunhofer IIS. Haris holds a Master's degree in Computational Engineering from FAU Erlangen-Nürnberg and a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Hamdard University.