Balakrishna C

Balakrishna C is a Full Chip Timing and Physical Design Engineer with extensive experience in PNR and STA across advanced technologies ranging from 3nm to 28nm. They have held positions at notable companies such as LSI, AMD, Cadence Design Systems, and Marvell Technology, where they currently serve as a Principal Engineer, leading teams in Physical Design and Timing Analysis. Balakrishna earned a B.Tech in EIE and an M.Tech in VLSI Systems, both with distinction, from respected institutions. Their expertise includes clock tree synthesis, timing closure, and signal integrity analysis, utilizing a variety of industry-standard tools.