Phat Bui

Principal Engineer - Signal Integrity/Power Integrity

Phat Bui is a Signal Integrity Engineer with a Bachelor’s Degree in Electronic and Telecommunication from the University of Science HCMC, earned in 2011. From 2011 to 2020, Phat worked as a Senior Design Engineer at eSilicon, focusing on pre-silicon memory test chip development, standard cell library creation, and PDK/CAD applications. They then served as a Senior Staff Signal Integrity Engineer at Inphi Corporation for a year, developing high-speed PCB channels for 112Gbps SerDes. Currently, Phat is a Principal Engineer at Marvell Technology, where they are developing high-speed PCB channels for 224Gbps SerDes.

Location

Vietnam

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