Raghuveer Shivaraj

Raghuveer Shivaraj is a seasoned semiconductor professional with extensive experience in Design for Test (DFT) and project management. Currently serving as Principal DFT Architect/Manager in the AI ML IP/SOC group at Marvell Semiconductor since December 2016, Raghuveer has been pivotal in team building, technical leadership, and driving design micro-architecture strategies. Prior to Marvell, Raghuveer worked as DFX Architect at Cavium Inc, focused on defining SOC and block-level DFT architectures. Raghuveer has also held roles at NVIDIA, where responsibilities included silicon bringup and test debug, and at Texas Instruments, where Raghuveer led DFT initiatives for mixed signal IPs and MCU SOCs. Raghuveer's career began at CG CoreEl - Mentor Graphics, providing DFT and design consulting. Educationally, Raghuveer holds a Post Graduate Diploma in VLSI Design from the Center For Development of Advanced Computing and a Bachelor of Engineering in Telecommunications from Bangalore University.