Shannon Galinat

Shannon Galinat is a Principal Physical Design Engineer & Manager at Marvell Technology, where extensive experience spans from August 2009 to the present, focusing on both 16nm and 28nm technology nodes and leading multiple 28nm tape-outs with design sizes up to 85M gates. Previously, Shannon served as a Senior ASIC Design Engineer at Freescale Semiconductor from June 1998 to January 2009, contributing to various multi-million gate SoC projects with roles in design, integration, and verification, utilizing VHDL, Verilog, and tools from Synopsys and Cadence. Shannon began a career as a Design Engineer at Rockwell Collins from January 1996 to June 1998, working on ASIC and FPGA design for commercial and military avionics systems. Shannon holds a Bachelor of Science in Electrical Engineering from North Dakota State University, earned between 1990 and 1995.