Yi-Ming L. is a Principal Engineer at Marvell Technology, specializing in IC physical design, timing analysis, and power analysis. With 15 years of experience in physical implementation from netlist to tapeout, Yi-Ming has successfully completed 24 tapeout projects and is proficient in TSMC 3nm and 5nm processes. Previously, Yi-Ming held the position of Physical Design Flow Manager at 創意電子 and served as a Senior Physical Design Engineer and later Physical Design Manager at GUC. Yi-Ming earned a Ph.D. in Computer Science and Information Engineering from National Cheng Kung University and was a visiting scholar at the University of Southern California.
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