MaxLinear
Jilian Zhu is an experienced ASIC design engineer with a robust career spanning over a decade. Currently serving as a Principal Engineer at MaxLinear since July 2013, Jilian has previously held the same title at MaxLinear from June 2010 to December 2011. Additional experience includes roles as a Senior Engineer at Anywave Communication, Trident Microsystems, Inc., and Micronas Semiconductors, Inc., where Jilian contributed to various engineering projects from 2000 to 2013. Jilian's extensive background reflects a deep expertise in ASIC design and engineering leadership.
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