Edward Kao

Edward Kao is an experienced ASIC Design Engineer currently at Meta since January 2025. Prior to this role, Edward worked at Intel Corporation from August 2016 to July 2024, serving as an IP Logic Design Engineer, where responsibilities included RTL logic design for uncore IP blocks in Xeon server chipsets and the maintenance of sub-blocks in mesh architecture. Edward also held the position of Component Design Engineer at Intel, focusing on pre-silicon validation for server chipset products and developing C++ checkers for complex cross-module features. Edward completed education at UCLA from 2008 to 2010.