Manal Shah

Manal Shah has extensive experience in the engineering and technology sectors, beginning as a Librarian at L.D College of Engineering in 2013, where responsibilities included cataloguing resources and managing staff. Manal worked as a Hardware Design Trainee at Bharat Sanchar Nigam Limited, gaining skills in telecom equipment and Verilog programming. Subsequent roles included Design Verification Engineer positions at Xilinx and Lattice Semiconductor, focusing on functional verification and the development of complex verification environments for cutting-edge technologies. As a Senior Design Verification Engineer at AMD, responsibilities included functional verification of memory controllers, and currently, Manal is engaged in designing next-generation silicon at Meta. Educational qualifications include a Bachelor’s degree in Electronics and Communication Engineering from L.D College of Engineering and a Master’s degree in Electrical Engineering from San Jose State University.