Manas Pange

Manas Pange is an accomplished ASIC Engineer currently working at Meta since July 2025. Prior to this role, Manas interned at Stanford University as an ASIC Design Intern, focusing on designing an ASIC for a Convolutional Neural Network model, contributing to physical design floorplanning, and achieving significant performance improvements. Experience as a Patent Analyst at ResearchWire Knowledge Solutions Pvt. Ltd. and an Associate System Engineer at Ayka Control Systems involved firmware development and PCB design for electric vehicle charging protocols. Manas has also held leadership positions as Hack Club Lead and Technical Head at EESA KJSCE. Educational qualifications include a Bachelor's degree in Electrical and Electronics Engineering from KJ Somaiya College of Engineering and ongoing Master's studies in Electrical Engineering at Columbia University, with an impressive academic record throughout.