Ramya Mohandoss is a skilled Digital Design Engineer currently employed at Meta since May 2022, bringing extensive experience from previous roles at Intel Corporation and Microsoft. At Intel, Ramya held positions including Senior IP Logic Design Engineer and Graduate Technical Intern, focusing on high-speed serial I/O digital logic design and SoC design hierarchy. Ramya's contributions included designing functional blocks for various protocols and collaborating with verification teams on test planning and debugging. At Microsoft, Ramya served as Hardware Engineer 2 and Senior Design Engineer. Ramya holds a Bachelor of Engineering in Electronics and Communication Engineering from Anna University and a Master of Science in VLSI, CAD, and Embedded Systems from the University of Massachusetts, Amherst.
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