Wei Kang Cheng has extensive experience in the field of engineering, currently serving as a design engineer at Micrel since 2010, specializing in logic design, verification, and methodology within GPHY. Prior to this role, Wei Kang Cheng worked as a senior design engineer at Silicon Laboratories from July 2008 to April 2010. Wei Kang Cheng holds a degree from National Chiao Tung University.
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