Aadeetya Shreedhar

Aadeetya Shreedhar is an experienced RTL Design Engineer with a comprehensive background in the semiconductor industry. Currently employed at SiFive since August 2022, Aadeetya previously held the same title at Marvell Technology from July 2018 to August 2022 and at Cavium Inc from March 2014 to July 2018. Aadeetya began the career with a role as an RTL and Digital Circuit Design Intern at Cavium Inc in the summer of 2013. Aadeetya holds a Master of Engineering in Electrical and Computer Engineering from Cornell University, obtained in 2014, as well as a Bachelor of Science in the same field, completed in 2013.