Amar Chadha

Amar Chadha is a seasoned professional in the field of ASIC verification, currently serving as a Senior Manager at Micron Technology since September 2018, where responsibilities include leading NVME SSD front-end verification and project management. Prior experience includes roles as a Principal Verification Engineer at Western Digital, focusing on NVME controller verification and enhancements to DV CAD flow, and a verification consultant in NVME controller front-end SOC level verification. Earlier positions include Principal Verification Engineer at Solarflare Communications, contributing to functional verification of PCIE/Ethernet network controllers, as well as verification roles at iStor Networks, Multilink Technology Corp., and Adaptec, where Amar was involved in design and ASIC/board design engineering. Amar earned both a Bachelor of Science in Electrical Engineering and a Master of Science in Electrical/Computer Engineering from the University of Southern California between 1987 and 1993.