Basma H. Salah

Basma H. Salah has a wealth of experience in the engineering field. In 2016, they were a zupervisor at KidZania Cairo. In 2017, they were a Trainee at Silicon Vision. In 2018, they worked as a Quality Assurance Engineer at Mentor Graphics, where they had experience with Verilog, SystemVerilog, Gate-Level Simulation (GLS) (Timing Cells and SDF), VHDL, Foreign Languages (VPI, DPI, FLI), and UVM. In 2019, they worked as a Digital Design and Verification Engineer at Synopsys Inc., where they verified 32G Ethernet PHY protocol using SystemVerilog, SystemVerilog Assertions and VMM/UVM, created checkers, stimuluses, and VMM tests, monitored regression and debugging failures, and suggested RTL fixes. Currently, Basma H. Salah is a Senior ASIC Design Engineer and an ASIC Design Engineer at Mixel, Inc.

Basma H. Salah has a comprehensive educational history. Basma earned their secondary degree from Maadi Canal School between 1999 and 2013. Basma then went on to pursue a Bachelor's degree in Electrical, Electronics and Communications Engineering from Faculty of Engineering Cairo University between 2013 and 2018. Currently, they are pursuing a Master's degree in Computer Engineering from Ain Shams University, which they will complete in 2023.