Huzaifa bin Anwar

Huzaifa bin Anwar is an FPGA Design Engineer at the National Aerospace Science & Technology Park (NASTP) since April 2024, previously serving as an FPGA Engineer at Rapidev from June 2021 to April 2024. In the role at Rapidev, Huzaifa specialized in RTL development, simulation through test benches, and on-chip debugging with ILA, alongside extensive experience in clock domain crossing for complex systems and working with ADI ADRV9361 System on Module (SOM), Zynq SoC, and Artix 7. Prior experience also includes a position as an Embedded Design Engineer, focusing on firmware development with STM MCU using Embedded-C and ARM microcontrollers. Huzaifa holds a Bachelor of Engineering in Electrical and Electronics Engineering from the University of Engineering and Technology, Taxila, obtained in June 2021.