Nemanja Kondic

Nemanja Kondic is a highly skilled senior hardware design engineer currently employed at NextSilicon since April 2022, specializing in RTL design using SystemVerilog and Verilog. Prior to this, Kondic served as a senior SoC IP hardware design engineer at Methods2Business BV from April 2014 to April 2022, focusing on the development of the hardware component for next-generation IEEE802.11ah wireless communication IP utilizing SystemC and Cadence high-level synthesis tools. Kondic began the professional journey as a hardware verification intern in July 2013. Educationally, Kondic holds a Master of Science in Electrical, Electronics and Communications Engineering from the Faculty of Technical Sciences Novi Sad (2013-2014) and a Bachelor of Science in the same field from the same institution (2009-2013).