Duvindu Piyasena

Duvindu Piyasena is a Senior ASIC Design Engineer at OMNIVISION, specializing in NPU and DDRC IP design and verification since February 2022. Prior to this role, Duvindu served as a Researcher at Nanyang Technological University, focusing on FPGA-based design and optimization strategies for CNN Deep Learning models and their deployment at the edge from August 2018 to January 2022. Duvindu's earlier experience includes positions as a Senior Engineer and Engineer in Hardware Accelerated Systems (FPGA) at MillenniumIT, where involvement included designing FPGA-based solutions for the London Stock Exchange. Duvindu holds a Master of Engineering from Nanyang Technological University and a B.Sc. Engineering (Hons) in Electronic and Telecommunication Engineering from the University of Moratuwa. Education journey also includes attendance at Nalanda College Colombo and ongoing studies with The Chartered Institute of Management Accountants.