Riley Creps

Riley Creps is a Design Verification Engineer with extensive experience in the field, currently leading UVM verification for FPGA designs at Paradigm Works, Inc. since April 2022. Previously, at L3Harris, Riley developed UVM Agents for SPI/QSPI and SRAM, incorporating peer feedback. Experience at BAE Systems involved building test-bench functionality in VHDL and interfacing with RF modules. An earlier career at US Synthetic included roles as an Automation Engineer, CNC Machinist, and Team Leader, focusing on system design and lean process improvements. Riley holds a Bachelor's Degree in Electrical Engineering from the University of Utah and completed high school at Juab High School.