Aneesh M K

Aneesh M K currently serves as a Senior IC Design Engineer (PDK) at PragmatIC since May 2022. Prior to this role, Aneesh worked as a Lead Application Engineer at Cadence Design Systems from April 2016 to April 2022 and as a Corporate Application Engineer at Synopsys from June 2011 to March 2016. Aneesh began the professional career as a Project Trainee at Texas Instruments from September 2010 to May 2011. Aneesh holds an M.Tech in VLSI Design from VIT University (2009 - 2011) and a B.Tech in Electronics & Communication Engineering from Calicut University (2005 - 2009). Additionally, Aneesh completed the 12th grade in Science at Kendriya Vidyalaya in 2005.