Feiyu Yang

Feiyu Yang is currently a Graphics ASIC Design Engineer at Qualcomm, having previously served as a Graphics ASIC Design Intern at the same company. Experience includes micro-architecting and RTL design for the Adreno GPU architecture, with a focus on optimizing hardware for performance, power, and cost. Prior to Qualcomm, Feiyu was a Design Verification Intern at Apple, where responsibilities included ensuring SoC quality and collaborating with design teams. Additionally, experience encompasses an internship in the Network Research Group at Microsoft and RTL design work at Pony.ai. Feiyu Yang holds a Master of Science in Electrical and Computer Engineering from UC San Diego and a Bachelor of Science in Electronic Information Engineering from the University of Chinese Academy of Sciences.