Jiechen Shou

Jiechen Shou is an accomplished lead ASIC designer at Rambus since June 2016, with a previous role as Senior Member Of Technical Staff 2. Prior experience includes a tenure at Inphi Corporation from June 2012 to June 2016, where Jiechen served as both Senior Design Verification Engineer and Design Verification Engineer. Jiechen Shou earned a degree from the University of Southern California between 2010 and 2012.