RISC - V (Risk Five)
Pavan Jagadish Moody has a background in Electrical and Electronics Engineering, holding a Bachelor of Engineering degree from AMC Engineering College in India and currently pursuing an Associate membership from the Institution of Engineers of India. Professional experience includes serving as an Individual Community Member at RISC-V International since July 2024, contributing to open-source technology initiatives. Previously, Pavan worked as an Embedded Engineer at Factana® from February 2024 to May 2025, an Embedded Software Developer at Achyutas Soft Pvt Ltd from January 2023 to February 2024, and completed an internship at Emertxe Information Technologies from May 2022 to February 2023. Additionally, experience includes a role as an Electrical Engineer at Larsen & Toubro from October 2021 to December 2022.
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RISC - V (Risk Five)
RISC - V (Risk Five) is a new instruction set architecture, supporting computer architecture research and education.