Sumit Kumar Dimri

Sumit Kumar Dimri has a diverse work experience spanning several companies and roles. Sumit Kumar most recently worked as an FPGA Verification Engineer at Rockport Networks since August 2021. Prior to this, they worked at Carleton University as a Graduate Teaching Assistant from September 2019 to April 2021, where they conducted labs, helped students with Verilog code, marked assignments, and implemented digital logic on an FPGA. Before that, Sumit worked as an Associate Design and Verification Engineer at 3ST Technologies from July 2018 to June 2019, where they created Verilog-based RTL designs and collaborated with a team of interns. Sumit Kumar also gained internship experience at Doordarshan Kendra in 2017 and MTNL in 2016.

Sumit Kumar Dimri pursued a Master of Engineering (MEng) degree in Electrical and Computer Engineering (ECE) from Carleton University between 2019 and 2021. Prior to that, between 2014 and 2018, they attended SRM University, although their specific degree and field of study were not provided. Before university, Sumit attended KV Sector 5 Dwarka, but no specific degree or field of study was mentioned for this educational institution.

In terms of additional certifications, Sumit obtained several certifications related to SystemVerilog. In February 2021, they completed the SystemVerilog Assertions v4.2 Exam at Cadence Design Systems. In September 2020, they earned the SYSTEMVERILOG UVM certification from Siemens. Sumit Kumar also received certifications in SYSTEMVERILOG OOP AND IPC, SYSTEMVERILOG RANDOMIZATION AND FUNCTIONAL COVERAGE, and SYSTEMVERILOG FUNDAMENTALS, all from Siemens in August 2020. Additionally, in May 2020, Sumit completed the "Introduction to FPGA Design for Embedded Systems" certification at the University of Colorado Boulder.