Arth Shah

Arth Shah is a seasoned Performance Architect with extensive experience in system architecture modeling and performance analysis, currently employed at Samsung Electronics since April 2023. Prior to this role, Arth was instrumental in the NCore performance modeling R&D team at Arteris from September 2019 to April 2023, where core responsibilities included developing SystemC TLM models, analyzing performance trade-offs, and delivering customer training. With a solid foundation as a Senior Digital Design Engineer at Qualcomm from February 2015 to September 2019, significant contributions included defining SoC interconnect bus topologies and mentoring interns. Earlier experience includes systems validation at Intel Corporation, focusing on pre-silicon RTL validation and bug discovery. Educational credentials include a Master’s degree in Electrical and Electronics Engineering from UCLA and a Bachelor of Technology from IIT Delhi.