Loganathan Gunasekaran

Loganathan Gunasekaran is a seasoned professional in the electronics engineering field with extensive experience in PCB design and layout. Currently serving as a Senior PWB Layout Engineer at Sanmina since December 2018, Loganathan has previously held significant roles at Mistral, including Module Lead and Senior Design Engineer, where expertise in high-speed interface layouts, flex rigid designs, and compliance with DFM/DFA standards was demonstrated. Earlier career experience includes a tenure as a CAD Engineer at Tejas Networks and D'Gipro Design Automation, focusing on HDI designs and high-speed technology. Educational qualifications include an Engineer’s Degree in Electronics and Telecommunications Engineering from Karnataka State Open University and a Bachelor’s Degree in Electronics and Communication Engineering from K.L.N.M. Polytechnic College.