Amir Sharfuddin

Amir Sharfuddin is a Verification Engineer at Scaledge Technology since February 2022, specializing in UVC component coding and sequence coding for APB/AXI features utilizing UVM methodology. Previous experience includes a role in design and verification at VLSIGuru Training Institute and serving as a Campus Recruiting Coordinator at the National Institute of Technology Srinagar. Amir also worked as a Subject Matter Expert at Chegg India and has foundational experience in Silvaco Atlas TCAD from the Indian Institute of Technology (Banaras Hindu University). Amir holds a Master of Technology in Microelectronics from the National Institute of Technology Srinagar and a Bachelor's in Electronic and Communications Engineering from Ansal Technical Campus. Educational background also includes intermediate and high school studies at reputable institutions in Uttar Pradesh.