Chunhua Deng

Chunhua Deng is currently a Senior Staff Design Engineer at ScaleFlux. Prior to this role, they were a Graduate Research Assistant at Rutgers University-New Brunswick from 2017-2021, where they compressed neural networks with permutated diagonal matrices. In 2020, they were an FPGA Engineer at MathWorks, where they designed HDMI video systems in Zynq FPGA boards and wrote Matlab scripts to generate FPGA SoC projects from Simulink models. In 2019, they were a Research Summer Intern-Graduate at IBM, where they developed a distributed DL training platform, implemented ring reduce protocols, distributed AXPY, and sparse and low-precision weight updates. From 2013-2017, they were a Research Scientist at Xiamen University. From 2007-2013, they were a Senior Digital IC Design Engineer at Sanechips, where they lead a team to write algorithm and RTL code for LTE/UMTS bit-processing systems, designed an energy-efficient HARQ combiner, and designed a Viterbi decoder by reversing its sequence.

Chunhua Deng began their educational journey in 2001 when they earned a Bachelor's degree in Electrical and Electronics Engineering from China University of Petroleum. Chunhua then went on to receive a Master's degree in Electrical and Electronics Engineering from The Beijing Institute of Technology in 2007. Finally, they completed their Doctor of Philosophy - PhD in Electrical and Computer Engineering from Rutgers University-New Brunswick in 2021.