Dana Burgess is a seasoned engineer with extensive experience in ASIC and FPGA design, currently serving as a Senior Engineer at SEAKR Engineering, Inc. since August 2019. Prior roles include Senior Engineer at Intel Corp, where responsibilities encompassed integrating and modifying subsystem designs, and Design Engineer at Avago Technologies, focusing on ASIC design and verification. Dana began career as an ASIC Engineer at Intellistor, advancing through positions with Freescale Semiconductor and Avago Technologies, demonstrating a strong background in coding, verification, and formal verification processes. Academic credentials include a BSE and a BS in Electrical and Electronics Engineering from Northern Arizona University.
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