Antoine Parel

Antoine Parel has work experience as a Junior Digital IC Designer at Sensirion starting in January 2022. Previously, they worked as a Digital Design Intern at NXP Semiconductors from February 2021 to August 2021. Antoine'searlier experience includes serving as an Academic Trainee Intern at Twining, Inc. in June 2019.

Antoine Parel's education history begins in 2015 when they attended Lycée Fénelon Sainte-Marie, where they completed a Preparatory Class "Maths Sup-Spé" program in Mathematics and Physics. From 2018 to 2021, Antoine pursued an Engineer's degree at Grenoble INP - Phelma, specializing in Micro-Nanotechnologies for Integrated Systems. During this time, they also studied at Politecnico di Torino in 2019-2020, focusing on a Master's Degree in Micro and Nanotechnologies for Integrated Systems. Finally, in 2020-2021, Antoine attended EPFL (École polytechnique fédérale de Lausanne) to complete a Master's Degree in Micro and Nanotechnologies for Integrated Systems.