Raghul Sakthivel

Raghul Sakthivel is an experienced VLSI Physical Verification Engineer currently employed at SeviTech Systems Pvt. Ltd. since January 2022, with a prior role at Wipro Limited from August 2017 to December 2021. Raghul possesses expertise in VLSI physical verification and design, specifically within the 14nm technology node, managing full PnR ownership, low power multi-voltage design, and RTL to GDS transitions for block and partition level designs. Raghul's educational background includes a B.Sc. in Information Technology from Karpagam Academy of Higher Education and an M.Tech in VLSI from Vellore Institute of Technology.