Emad Fahim

Emad Fahim is a CPU Design Engineer II at SiFive, a position held since October 2022. Previously, Emad served as a CPU Engineer Intern at Arm from March to August 2022 and completed a research internship at Technische Universität Darmstadt, where a bachelor's thesis focused on a side-channel resilient cache microarchitecture for RISC-V processors was awarded an "A+" grade. Experience also includes a role as a university research assistant at The German University in Cairo, implementing machine learning algorithms on FPGAs, which resulted in an IEEE publication, and a junior teaching assistant position at the same university. Emad holds a Master's degree in Embedded Systems from Grenoble INP - UGA and a Bachelor of Science in Electronic Engineering from The German University in Cairo.